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    Development of High-Performance Hafnium Oxide based Non-Volatile Memory Devices on 300mm Wafer Platform for Data Storage and Neuromorphic Applications

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    Author
    Hazra, Jubin
    Keyword
    non-volatile memory (NVM)
    resistive random-access memory (RRAM)
    von Neumann computing architectures
    Dynamic random-access memory (DRAM)
    NAND Flash
    high performance embedded memory
    mass data storage
    Date Published
    2021-08
    
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    URI
    http://hdl.handle.net/20.500.12648/2061
    Abstract
    Fundamental limitations associated with scaling and modern von Neumann computing architectures illustrates the need for emerging memory solutions in the semiconductor industry. One such promising non-volatile memory (NVM) solution is resistive random access memory (RRAM), which is seen as a potential candidate that can meet the performance needs of DRAM and the density of NAND Flash in terms of scalability, reliability and switching performance. However, reliable operation of RRAM devices requires further development to remedy device- to-device and cycle-to-cycle uniformity variation, increase the conductance window, and to improve retention, yield and endurance properties. This research work primarily focuses on improving RRAM performance metrics through optimization of processing conditions and programming algorithms for CMOS-integrated nanoscale HfO2 RRAM devices on a full scale 300mm wafer platform. It was observed that tuning of ALD parameters during RRAM switching layer HfO2 deposition had a significant impact on device switching performance. An excellent memory window of >30 with switching yield ~90%, along with low cycle-to-cycle (σ <0.5) and cell-to-cell variability (σ <0.4) were achieved for tested 1 Transistor 1 RRAM (1T1R) cells across full 300mm wafers. The devices demonstrated excellent endurance (>1010 switching cycles) and data retention performance at elevated temperature (105 s at 373K). The fabricated RRAM cells were also optimized for multi-level-cell switching behavior and ~10 distinct resistance levels were obtained through a combined current- and voltage-control based programming approach. An incremental pulse write technique combined with read verification algorithm enabled accurate resistance states programming within a large resistance window along with linear and symmetric potentiation-depression characteristics yielding superior analog synaptic functionality of fabricated RRAM devices. In addition to RRAM devices, hafnium zirconium oxide (HZO) based nanoscale ferroelectric tunnel junction (FTJ) devices were successfully implemented on a 300 mm wafer platform. Current measurement, as a function of voltage for both up and down polarization states, yielded a tunneling electroresistance (TER) ratio of ~5 and switching endurance up to 106 cycles in TiN/ Al2O3/ Hf0.5Zr0.5O2/ TiN FTJ devices distributed across full 300 mm wafer. Investigation of current transport mechanisms showed that the conduction in these FTJ devices is dominated by direct tunneling (DT) at low electric field and by Fowler-Nordheim (F-N) tunneling at high electric field. The realization of CMOS-compatible nanoscale RRAM and FTJ devices on 300mm wafers demonstrates the promising potential of these devices in large scale high-yield NVM manufacturing for high performance embedded memory and mass data storage applications.
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      Liehr, Maximilian (2022-12)
      Current trends towards more efficient computing include alternatives to the standard von Neumann architecture and a trend towards in-memory computing with non-volatile memory (NVM) arrays. Resistive Random-Access Memory (ReRAM) is a strong NVM candidate for such applications. In this work, performance optimization and reliability studies were performed using hafnium oxide and tantalum oxide-based ReRAM devices integrated into 65nm CMOS. A thorough analysis of the effects of switching parameters such as maximum current, voltage, pulse width, and temperature-based stress culminated in improved device performance, yielding a memory window (MW) > 30, excellent endurance >2.1x1010, and retention at multiple resistance levels for 104 seconds without degradation. When the operational temperature was ramped from 25-125 °C oxygen vacancy mobility and generation rates shifted in these devices, directly affecting MW by up to 2X. To demonstrate the potential of ReRAM for neuromorphic applications, multilevel (analog) switching was implemented, achieving a total of >10 statistically distinct resistance levels when using large (>50 ns) pulses. When using ultra-short pulses (300 ps) the number of resistance states was limited to < 15 and resulted in a narrow conduction window (CW) of ~2X. Thus, an optimized pulsing scheme, incremental pulsing (ISPP), was utilized in which successive switching pulses increase in voltage amplitude. When used in conjunction with a read-verify scheme, the total number of resistance states increased to >20 and the CW increased to ~31X respectively, while also maintaining the linearity and symmetry of potentiation or depression. Based on these empirical data, the Neural Network (NN) learning algorithm “Cross-Sim” simulator was trained on the MNIST dataset, yielding 96.55% accuracy, on a 96.7% baseline, when using the ISPP algorithm. Taken together, these results demonstrate the potential of ReRAM 24 for non-von Neumann computing applications once proper optimization of electrical switching parameters and operational temperature is achieved.
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      A Letter About Memory - short film "Memory and the Collection of Sentimental Objects" - research paper

      OSTRANDER, Bethany (2020)
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      Memory as a continuation of movement: effects of auditory temporal structure on memory performance with differing cognitive loads

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