Browsing Colleges of Nanoscale Science and Engineering Doctoral Dissertations by Title
Now showing items 8-11 of 11
Mapping, Implementing, and Programming Spiking Neural NetworksComputer architectures inspired by biological neural networks are currently an area of growing interest, due to immense utility of these systems which is shown by their near-ubiquity within animals. An essential aspect of these systems is their ability to compute through the exchange of temporal events called ‘spikes.’ However, many aspects of biological computation remain unknown. To improve our ability to measure neural systems, we create an efficient implementation and statistical testing method to calculate an information-theory based metric, transfer entropy, on signals recorded from cultures of neurons. Taking inspiration from established knowledge regarding biological neurons, we investigate the impact which stochastic behavior has on the robustness of spiking networks when their synaptic weights are inaccurate. We find that a level of stochasticity can help improve this robustness. Lastly, we investigate methods of creating programs for spike-based computation through evolutionary optimization methods, and identify opportunities and challenges in this area.
MAXIMIZING THE CHEMICAL REMOVAL OF CERIA ABRASIVES IN CMP FOR SILICON OXIDE AND METAL POLISHINGCerium oxide or ceria has garnered a wide range of applications due to its redox active nature. This redox activity is due to oxygen vacancies on the surface of the ceria creating a layer of mixed oxide with the unstable oxide Ce2O3 (Ce[superscript 3+]) present at the same time as the bulk oxide CeO2 (Ce[superscript 4+]). Possible applications for ceria include water splitting, oxidation of carbon monoxide, oxidation of reactive oxygen species and polishing of glass films. In recent years, ceria nanoparticles have been used for polishing thermal silicon oxide during the early steps of semiconductor fabrication in a process referred to as chemical mechanical planarization (CMP). The advantage of these particles is their ability to abrade an oxide surface chemically using the aforementioned redox properties, as well as mechanically. To meet the needs of manufacturing, mainly removal rate and surface roughness, the particles used must have well controlled physical properties such as size and shape for mechanical removal and ratio of cerium oxidation state for chemical removal. This study encompasses three parts following the design of ceria slurries, their implementation in the existing silicon oxide polish and applying these findings to create novel slurries for polishing metals. To design ceria slurry, the ratio of Ce[superscript 3+]/Ce[superscript 4+] on the surface of abrasive was maximized by altering the slurries’ chemical environment. Maximizing this ratio increases the proportion of active Ce[superscript 3+] sites which participate in removal reactions. The effect of chemical environment on the Ce[superscript 3+]/Ce[superscript 4+] ratio was determined through XPS analysis of the Ce 3d spectrum. The knowledge gained in this first section informed the design of ceria slurries for the following two parts to maximize their effectiveness. The second part of this thesis applies this knowledge to create ceria iv slurries that polished thermal oxide with higher material removal rate (MRR) and lower postpolish roughness than slurries that are currently being used in industry. The basis of ceria polishing is known as the tooth-comb model. In this model oxygen at Ce[superscript 3+] sites will undergo a condensation reaction with oxygen on the surface to be polished. As the particle leaves this will rip material off of the wafer surface. While the tooth-comb model was proposed for polishing silica, the final part of this thesis seeks to generalize it to encompass polishing any oxide given the correct conditions. To demonstrate this, I created ceria slurries to polish metals relevant to the semiconductor industry (copper, tungsten and ruthenium) with polishing metrics that equal or exceed those of industry standard slurries.
Nanoscale Schottky Barrier Visualization Utilizing Computational Modeling and Ballistic Electron Emission MicroscopyUnderstanding the properties and performance of semiconductor interfaces on the nanoscale advances semiconductor device technology which has had tremendous impact on nearly all aspects of our daily lives. Investigating the nanoscale fluctuations in the electrostatics of metal-semiconductor, or Schottky, interfaces is crucial. However, techniques for directly measuring the electrostatics at an interface are limited. Current state-of-the-art finFETs use metal-semiconductor silicides, such as Ti-Si/Si, for Schottky source-drain contacts. Studying the underlying physics of the Schottky barrier interface of silicides and other metal-semiconductor systems is critical for measuring the Schottky barrier accurately, which can be accomplished with ballistic electron emission microscopy (BEEM), a scanning tunneling microscopy (STM) based technique. In this work, the visualization of the interface to nanoscale dimensions is enhanced by computational modelling of threshold histograms acquired by the BEEM measurement technique. Modelling using a kinetic Monte-Carlo approach is utilized to simulate the distributions of barrier heights that includes effects from the interface and transport of the hot electrons as well as indication of a multi-barrier heights present at the interface. The aid of this modelling enables the discovery of several underlying properties of the interface. Analyzing the parameters of the modelling and comparing to measured data provides detailed insight into the effects that both electron scattering and incomplete silicide formation in W/Si(001) and WSi2/Si(001) have upon the transport of electrons through these structures, which is difficult to detect with conventional current-voltage measurements. The modelling also includes simulation of multiple barriers present at the interface due to the intermixing of similar metals such as Au and Ag at the interface of Si(001) In this regard, Schottky barrier visualization as the combination of histograms, mapping, and modelling provides a new insight into the local nanoscale phenomenon of the Schottky barrier. This thesis investigates the modelling of these metal-semiconductor systems and uses modelling to look at metal thickness dependent effects on the Schottky barrier from Fermi-level pinning in Au/Cr-Si/Si(001) and Au/Cr-Si/Si(111) silicide.
ULTRATHIN HIGH-K OXIDES FOR AREA-SELECTIVE DEPOSITION AND CHARACTERIZATION BY BALLISTIC ELECTRON EMISSION MICROSCOPY AND X-RAY PHOTOEMISSION SPECTROSCOPYInsulators play an important role in the architecture and resulting performance of semiconductor devices manufactured today. Materials such as HfO2 and Al2O3 are utilized as gate oxides and spacers to control leakage current and enable bottom-up self-aligned patterning of device features. Understanding the electrostatic barrier that forms at the metal-oxide-semiconductor (MOS) interface is crucial in the development of field effect transistors and other devices, especially as the scaling of device features continues to shrink into the nanoscale. Characterization of the barrier height using current-voltage (IV) and capacitance-voltage (CV) techniques provides only a spatially averaged view of the interface, and is incapable of accounting for local nonuniformity which arises at nanoscale dimensions. Additionally, common lithographic strategies for patterning small feature oxides are limited by printing misalignments such as edge placement error (EPE), and in order to achieve smaller pitch sizes lithography steps must be repeated multiple times which adds time and cost to the process. The feasibility of uniform, cost-effective insulator films at the 5 nm technology node and beyond relies on the development of new deposition strategies. In this thesis, hafnium oxide grown using atomic layer deposition (ALD) is examined with ballistic electron emission microscopy (BEEM). Localized nonuniformities in the barrier height are found to exist for two identically prepared samples which reveal three distinct electrostatic barriers at the buried Au/HfO2/SiO2/Si-p interface, including a novel barrier found at 0.45 eV due to ultrathin HfO2. The results uncover changes in electrostatic behavior of the film which are otherwise impossible to detect using spatially averaged techniques. These variations in barrier height are visualized in a novel way that produces spatial maps showing transitions between high energy and lower energy barriers across a few nanometers. The resolution of this mapping technique is determined by comparing the measured barrier heights of Au/Si(001) and Au/Si(111) interfaces. Momentum conservation and electron scattering result in slightly different barrier heights for both interfaces that depends on metal thickness. The Rayleigh criterion is applied to the barrier height distributions as a function of metal thickness, resulting in a 10 meV resolution. Both aluminum oxide and hafnium oxide are also selectively grown on patterned metal / low-k silicon wafers using ALD. Self-assembled monolayer (SAM) materials such as octodecanethiol (ODT) and dodecanethiol (DDT) -which are functionalized to metal -are first deposited on the copper lines in order to block high-k film deposi¬tion on metal. Both HfO2 and Al2O3 are shown to selectively cover the low-k lines for linespace pitches greater than 100 nm and 5 mM concentration of SAM, and better selectivity is achieved for smaller pitches using lower SAM concentrations. Selectivity is measured qualitatively and quantitatively using x-ray photoemission spectroscopy and confirmed with transmission electron microscopy.